Many semiconductors packages, such as the now familiar dual in-line package (DIP), utilize a metallic leadframe forming a pattern of metal interconnections (leads) embedded in a glass surface on a ceramic base to which a semiconductor chip is attached. The leads provide electrical interconnections between the semiconductor chip and other electronic components. Typically, the innermost portion of each lead functions as a bonding tip to which connection is made by a fine metallic wire (usually gold or aluminum) which is itself bonded to the semiconductor chip. The leadframe configuration therefore includes a large number of bonding tips surrounding the semiconductor chip.
In the manufacture of packages with larger numbers of leads it has been a problem to maintain appropriate lead-to-lead spacing between the bonding tips. Maintaining coplanarity of the bonding tips has also been difficult. These problems probably arise from the release or formation of mechanical stresses built up within the metallic leads when the package is heated to embed the metallic leadframe in a glass layer on the surface of the base. Furthermore, the glass layer itself is not precisely uniform, causing relative displacements of the bonding tips. The resulting packages exhibit variations in the lead-to-lead capacitances, or even electrical short circuits between some of the leads. Additionally, the non-uniformity in spacing and/or co-planarity of the bonding tips makes automated bonding to the semiconductor chip unreliable. For all of these reasons the manufacture of packages with more than about 40 leads is extremely difficult with present technology.